1. Field of the Invention
The present invention relates to a device and method for controlling a driving voltage, and more particularly to a device and method for outputting a suitable driving voltage for each of a plurality of devices (e.g., liquid crystal display panels).
2. Description of the Background Art
Driving voltage control devices in which the bias current of an operational amplifier is controlled so as to reduce the power consumption while the circuit area is reduced so as to prevent an increase in cost are known in the art (see, for example, Japanese Laid-Open Patent Publication No. 2003-216256). With a driving voltage control device disclosed in Japanese Laid-Open Patent Publication No. 2003-216256, it is possible to suitably drive a single liquid crystal display panel.
Recently, more portable devices such as mobile telephones have more than one liquid crystal display panels. With such a product, it is necessary to supply an optimal driving voltage to each of the liquid crystal display panels. Conventionally, the same number of driving voltage control devices as the number of liquid crystal display panels are provided.
However, with a mobile telephone having two liquid crystal display screens, one on the front and one on the back, for example, it is often the case that the main liquid crystal display screen (main liquid crystal display panel; hereinafter referred simply as “main panel”) and the sub-liquid crystal display screen (sub-liquid crystal display panel; hereinafter referred simply as “sub-panel”) are not viewed at the same time. In such a case, providing a single driving voltage control device capable of supplying an optimal driving voltage to one of the liquid crystal display panels that is being viewed by the user is preferable in terms of cost, for example, to providing the same number of driving voltage control devices as the number of liquid crystal display panels.
Conventional Driving Voltage Control Device
FIG. 10 shows a general configuration of a conventional driving voltage control device 9. The device 9 includes a timing control section 901, a VCOM voltage generation section 902, a VCOMH operational amplifier 903H, a VCOML operational amplifier 903L, smoothing capacitors C904-H and C904-L, switches SW5 to SW8 and output terminals 905M and 905S. The device 9 supplies a different set of optimal driving voltages VCOMH and VCOML to the counter electrode (not shown) of the main panel and to that of the sub-panel (i.e., the device 9 generates two different sets of driving voltages VCOMH and VCOML). The driving voltages VCOMH and VCOML are voltages that are used for driving the counter electrode of the main panel and that of the sub-panel.
The VCOM voltage generation section 902 generates the driving voltages VCOMH and VCOML according to the control signals Sa and Sb output from the timing control section 901. For example, the VCOM voltage generation section 902 may be an RDAC (Resistance Digital Analog Converter) and have a configuration as shown in FIG. 2.
The smoothing capacitors C904-H and C904-L each have a capacitance value on the order of . F (microfarads).
Operation
Next, an operation of the driving voltage control device 9 shown in FIG. 10 will be described with reference to FIG. 4A to FIG. 4D and FIG. 11A and FIG. 11B.
Period T1-T4
During the period T1-T4, the driving voltage control device 9 controls the driving voltages VCOMH and VCOML to be output to the counter electrode of the main panel.
When a state indicating signal STATE is received, the timing control section 901 outputs the control signals Sa and Sb to the VCOM voltage generation section 902 and brings control signals S7 and S8 to “H level” and “L level”, respectively. The timing control signal Sa indicates the voltage value of the driving voltage VCOMH to be generated by the VCOM voltage generation section 902. The control signal Sb indicates the voltage value of the driving voltage VCOMH to be generated by the VCOM voltage generation section 902. In the illustrated example, during the period T1-T4, the control signal Sa indicates a voltage value of “+3 V” and the control signal Sb indicates a voltage value of “−3 V”.
Then, the VCOM voltage generation section 902 generates the driving voltages VCOMH and VCOML according to the control signals Sa and Sb.
Then, the VCOMH operational amplifier 903H outputs the driving voltage VCOMH generated by the VCOM voltage generation section 902. The VCOML operational amplifier 903L outputs the driving voltage VCOML generated by the VCOM voltage generation section 902. Thus, the smoothing capacitor C904-H stores an amount of charge according to the voltage value (+3 V) of the driving voltage VCOMH, and the smoothing capacitor C904-L stores an amount of charge according to the voltage value (−3 V) of the driving voltage VCOML.
In response to a timing signal TIMING, the timing control section 901 alternately brings control signals S5 and S6 to “H level”. Therefore, the output from the output terminal 905M alternates between “−3 V” and “+3 V” at intervals of one time segment, as shown in FIG. 11A.
Period T6-T9
During the period T6-T9, the driving voltage control device 9 controls the driving voltages VCOMH and VCOML to be output to the counter electrode of the sub-panel.
When the state indicating signal STATE is received, the timing control section 901 outputs the control signals Sa and Sb to the VCOM voltage generation section 902 and brings the control signals S5 and S6 to “H level” and “L level”, respectively. In the illustrated example, during the period T6-T9, the control signal Sa indicates a voltage value of “+2 V” and the control signal Sb indicates a voltage value of “−2.5 V”.
Then, the VCOM voltage generation section 902, the VCOMH operational amplifier 903H and the VCOML operational amplifier 903L perform an operation similar to that during the period T1-T4. Thus, the smoothing capacitor C904-H stores an amount of charge according to the voltage value (+2 V) of the driving voltage VCOMH, and the smoothing capacitor C904-L stores an amount of charge according to the voltage value (−2.5 V) of the driving voltage VCOML.
In response to the timing signal TIMING, the timing control section 901 alternately brings control signals S7 and S8 to “H level”. Therefore, the output from the output terminal 905S alternates between “−2.5 V” and “+2 V” at intervals of one time segment, as shown in FIG. 11B.
Period T5
In the period T5, the timing control section 901 newly receives the state indicating signal STATE indicating “sub-panel driving operation”, and changes the control signals Sa and Sb. Specifically, the voltage value indicated by the control signal Sa is changed from “+3 V” to “+2 V”, and the voltage value indicated by the control signal Sb is changed from “−3 V” to “−2.5 V”. The voltage values of the driving voltages VCOMH and VCOML generated by the VCOM voltage generation section 902 are changed as described above.
Thus, the conventional driving voltage control device 9 supplies the driving voltages VCOMH and VCOML of suitable values to the counter electrode of each of the main panel and the sub-panel.